Printed circuit boards (PCBs) are essential components in almost all modern electronics. They provide the mechanical structure to mount and interconnect electronic components using conductive pathways or traces etched from copper sheets laminated onto a non-conductive substrate. PCBs allow complex circuit designs to be laid out in a compact format and mass produced.
When designing PCBs, electrical engineers must consider many factors to ensure the board functions correctly. Two important electrical parameters to analyze are transmission lines and impedance matching. Transmission lines describe how signals propagate along PCB traces and affect signal integrity. Impedance is a measure of opposition to AC current flow. Proper impedance matching helps maximize power transfer and minimize signal reflections.
The terms TG and TD refer to impedance related properties of PCB transmission lines. Understanding TG and TD is key for optimizing high frequency PCB layouts. This article provides an in-depth overview of TG and TD, when they become relevant in circuit analysis, how to calculate them, and design techniques to control their values on a PCB.
What is Transmission Line Theory?
Transmission line theory analyzes electrical signals propagating along a conductive pathway, like a copper trace on a PCB. At low frequencies, traces can be modeled simply as perfect conductive wires. But at higher frequencies, the electromagnetic properties must be considered.
Transmission lines have four key properties:
- Resistance (R) - resistive loss per unit length
- Inductance (L) - magnetic field induced
- Capacitance (C) - electric field between conductors
- Conductance (G) - leakage current between lines
Together, the RLCG parameters define a transmission line's characteristic impedance Z0:
Z0 = sqrt(R + jwL / G + jwC)
Where j is an imaginary number and w is angular frequency.
On PCBs, ideal traces have negligible conductance G. So the impedance reduces to:
Z0 = sqrt(R + jwL) / (jCw)
The terminating impedanceConnected at the end of the line is an important factor as well. Reflections occur if the line is not properly matched to its impedance. This can distort digital signals and cause EMI problems.
Transmission lines effects generally occur when:
- Trace length > 1/10 wavelength of highest frequency component
- Rise time < 2x propagation delay of line
For example, a 100 MHz signal has a 3 meter wavelength. So traces over 3 cm can potentially cause issues. Knowing when transmission line analysis is needed is the first step.
What is Transverse Electric and Magnetic (TEM) Waves?
Electromagnetic waves can propagate in different modes depending on the orientation of their electric and magnetic fields. The ideal type of wave propagation on PCBs is the transverse electromagnetic (TEM) mode.
TEM Wave Propagation (Image from AllAboutCircuits)
In a TEM wave, the electric and magnetic fields are perpendicular both to each other and the direction of propagation along the transmission line. This allows the wave to travel efficiently without leakage or external interference.
PCB traces exhibit primarily TEM propagation. But certain effects like skin effect and dielectric losses will cause some attenuation. Still, analyzing transmission lines as TEM waves holds as a good approximation at typical PCB frequencies and board materials.
What is Characteristic Impedance?
The characteristic impedance (Z0) is one of the most important transmission line parameters. It is determined by the physical geometry and material properties of the line. For a PCB microstrip trace, this includes:
- Trace width (w)
- Trace thickness (t)
- Dielectric height (h)
- Dielectric constant (εr)
By modeling the trace as a TEM transmission line, you can calculate Z0 from capacitance per unit length (C) and inductance per unit length (L):
Z0 = sqrt(L / C)
For a microstrip line, approximate closed-form equations exist to determine L and C based on the physical parameters. Z0 is then:
Z0 = (120π / √εr) / (w/h + 1.393 + 0.667ln(w/h + 1.444))
More precise values can be obtained through electromagnetic simulation tools like Sonnet or Ansys HFSS.
Matching Z0 is critical - a transmission line should be matched to its source and load impedances for maximum power transfer. If not matched, signal reflections will occur. Terminating traces in their Z0 helps absorb signals and minimize reflections.
What is TG in PCBs?
TG stands for transmission line gap. It refers to the spacing between a signal trace and an adjacent ground or reference plane on a PCB. This is illustrated in the figure below:
TG - Trace to Ground Gap (Image from ResearchGate)
The TG gap forms part of the dielectric material that separates charge between the signal trace and ground plane. This contributes to capacitance per unit length, which determines Z0.
Narrowing the TG gap increases capacitive coupling to ground. This lowers the characteristic impedance. Widening the gap has the opposite effect, increasing Z0.
Controlling the TG gap provides a way to intentionally tune the trace impedance on a PCB. Matching Z0 requires careful attention to trace dimensions and spacing. This helps maintain signal integrity through impedance matching.
What is TD in PCBs?
TD stands for transmission line delay. It represents the time required for an electrical signal to propagate along a PCB trace.
TD is determined by the trace length (l) divided by velocity of propagation (v):
TD = l / v
Velocity of propagation depends on the dielectric constant (εr) of the insulating PCB material:
v = c / √εr
Where c is the speed of light in a vacuum. The delay results from the signal propagating slower through the dielectric compared to air.
For example, FR-4 PCB material has a relative dielectric constant of around 4. That gives a v ~ c/2 or about 150,000 km/s. A 10 cm long trace would have a 66 ps propagation delay.
Knowing the TD is important for clock distribution and other time-critical signals. Extra delay on clock networks could jeopardize meeting timing margins. Matching trace lengths helps ensure synchronized arrival times. This is illustrated below:
Matching Trace Lengths to Minimize Skew (Image from ResearchGate)
TD also determines the applicable frequency range for transmission line analysis, as mentioned earlier. Overall, managing TD is key for optimum circuit performance.
How to Calculate TG
The transmission line gap TG can be calculated based on a trace's geometry and spacing from ground. For an external microstrip line:
TG = (Trace Height) - (Dielectric Thickness)
Where trace height is measured from the top of dielectric to bottom of trace. Dielectric thickness is the vertical distance between trace and ground plane.
Microstrip Dimensions (Image from ResearchGate)
More complex formulas incorporate the impact of trace thickness and width on electric field lines. But the above equation provides a reasonable approximation for initial calculations.
The key point is that TG directly depends on trace height and spacing from the ground plane. Decreasing dielectric thickness reduces TG, while increasing trace height raises it. This relationship allows tuning the trace impedance as needed.
How to Calculate TD
The transmission line delay TD can be calculated from the dielectric constant and physical trace length:
TD = (Trace Length) / (c / √εr)
Where:
- c = speed of light (~3e8 m/s)
- εr = relative dielectric constant
- Trace Length = length of PCB trace
For example, consider a 15 cm trace on FR-4 material (εr = 4):
TD = (0.15 m) / (3e8 m/s / √4)
= 0.15 m / (1.5e8 m/s)
= 100 ps
The key factors are the dielectric constant, which slows the propagation velocity, and the trace length. Changing substrates or extending the trace increases TD.
This delay may become significant for signals above ~1 GHz. At lower frequencies, trace lengths below 10-20 cm can often be analyzed as ideal conductors with negligible delay.
Why Control TG and TD?
Controlling the TG and TD parameters on PCBs provides several benefits for signal integrity and EMC:
Impedance Matching
- TG controls trace impedance Z0
- Matching Z0 enhances signal quality and efficiency
Timing
- TD affects signal propagation time
- Managing TD eliminates skew between related signals
EMI Reduction
- Tight TG spacing contains electromagnetic fields
- Prevents coupling noise to nearby sensitive traces
Signal Reflections
- Mismatched Z0 causes reflections
- Reflections distort signal waveform and timing
Overall, optimizing TG and TD creates a robust PCB environment for high-speed signals. This is especially critical for modern digital systems with fast edge rates and tight timing margins.
Proper microwave design techniques should be applied, including:
- Uniform TG spacing of coupled lines
- Minimizing stub lengths
- Choosing TD to avoid resonance points
- Terminating traces in Z0
Simulation tools help verify controlled impedance paths and account for delay in signal distribution.
TG and TD Design Guidelines
Here are some general guidelines for managing TG and TD on a PCB:
TG - Gap to Ground
- Use thinner dielectrics to reduce TG, increasing capacitance and lowering Z0
- Wider traces increase TG, raising Z0
- TG variation causes impedance discontinuities
- Keep TG tight and consistent for differential pairs
- Allows closer routing with stronger coupling
TD - Delay
- Minimize trace length for fast signals like clocks
- Match lengths between related signals
- Route critical paths on inner layers for shorter TD
- Change dielectric material to reduce TD
- Increase spacing between traces with fast rise times
Other
- Include ground fills around all layers with high speed routing
- Use vias to stitch ground planes for return paths
- Eliminate right angle turns on traces
Simulating the PCB stackup and layout is important to verify impedance targets and timing margins are met. This helps avoid signal integrity issues from the start.
High Frequency Modeling of Traces
At higher frequencies, PCB traces exhibit complex behavior not captured by simple transmission line models. Effects like dielectric loss, skin effect, and parasitic coupling become relevant. This leads to phenomena like:
- Resonances
- Increased insertion loss
- Crosstalk
- Reflection and ringing
To analyze these effects, traces must be modeled with their distributed RLCG parameters. The parameters are frequency dependent due to skin effect, dielectric losses, etc.
Full wave 3D electromagnetic (EM) simulators are typically needed to extract accurate wideband SPICE models. These tools compute S-parameters from first principles Maxwell's equations.
The S-parameter models can then be imported into circuit simulators to analyze frequency response. Effects like ringing, eye closure, timing jitter, and EMI can be simulated to ensure the PCB layout meets signal integrity requirements.
Proper modeling is key to minimizing SI issues from the start of the design process. Relying solely on TD and Z0 is insufficient at higher speeds.
Example Scenarios
Here are a few examples highlighting when TG and TD become important design considerations:
10 Gbps Differential Microstrip Lines
- TG gap kept very tight (< 0.1 mm)
- Consistent along entire line length
- Minimizes Intra-pair skew
- Allows impedance to approach 100 Ω diff.
DDR3 Memory Routing
- Match DQS/DQ trace lengths within 50 mils
- Eliminates skew between data/strobe signals
- Meets tight timing margins at bus speeds up to 1.6 Gbps
PCIe Gen 4 Channel
- Simulate eye diagrams and jitter to assess TD impact
- Adds TD of ~40 ps per inch of trace
- Verify timing budget at 16+ Gbps with EM models
HDMI Cable
- Match 100 Ω diff. impedance for TMDS channels
- Prevents reflections degrading eye at 1.65 Gbps pixel rate
- Skew managed by twinaxial cable construction
USB 3.2
- Route USB pairs as 100 Ω differential striplines
- Minimizestubs and vias
- Verify signal integrity at 20 Gbps with S-parameter models
In each case above, controlling TG and TD is needed to deliver clean signals and avoid issues like reflections, timing violations, and EMI.
Conclusion
TG and TD are fundamental transmission line parameters for optimizing PCB layouts in high speed digital systems. TG defines the spacing between signal and ground and determines characteristic impedance Z0. TD represents propagation delay along a trace.
Managing TG and TD provides multiple benefits for signal integrity. Impedance discontinuities are reduced through consistent TG spacing. Timing skew is minimized by matching trace lengths and TD. Reflections and EMI are decreased by proper return paths and termination.
At lower frequencies, back-of-the-envelope calculations for TG and TD may suffice. But microwave analysis techniques and EM simulations are essential for today's multi-gigabit designs. Proper modeling ensures the PCB layout will perform as intended before manufacturing.
Understanding transmission lines theory concepts like TG and TD helps engineers design robust, high-speed PCBs. Proper management of these parameters is key to tackling continuing advances in signal speeds and bandwidth.
Frequently Asked Questions
What is a good TG height to use?
For typical FR-4 designs, a TG height between 4-8 mils offers a good tradeoff. Lower TG values are possible with thinner dielectrics but allow less tolerance in manufacturing. Most traces can achieve 50-100 Ohm impedance with TG in this range.
How accurately do I need to match TD?
For matched length routing, try to keep TD skew below 5-10% of the signal rise time. For example, 10 ps skew for 200 ps rise time. Tighter matching may be needed for multi-GHz clocks and strobes.
When do I need to start worrying about transmission lines?
General guidelines are traces longer than 1/10 wavelength or rise times under 2x propagation delay. For 10 Gbps signals, this means trace lengths above ~2-3 cm on FR-4 are candidates for transmission line analysis.
Can I calculate TD without knowing the dielectric constant?
Yes, you can estimate TD by the physical length alone using ~5 ns/foot or ~1.7 ps/mm as a reasonable rule of thumb for FR-4 boards. This assumes an ER of 4. For more precision, the material ER should be obtained from the laminate datasheet.
How do I model transmission lines in circuit simulations?
Use an EM tool like Sonnet to extract broadband S-parameter models. These capture frequency-dependent losses and dispersion. The S-parameters can be imported into SPICE to co-simulate with active circuits and analyze effects like eye closure and jitter.