Everything from 8-bit to 32-bit MCUs will use at least one of these protocols alongside GPIOs for programmability and sending signals to simple peripherals. These three serial protocols are bus protocols; I2C and UART use addressing schemes, while SPI is addressless. Although SPI is addressless, it is a bus protocol and can still be used to select downstream devices to receive data.
I2C (pronounced I-squared C, or sometimes IIC for inter-integrated circuit) uses two lines (standard, fast, and fast-plus modes) to control other devices; one line is a clock line (SCL), while the other is a data line (SDA). It comes in three modes, which are summarized in the table below. Note that the rise/fall time values assume the typical series resistors are installed at the I/Os.
Mode
Data rate/clock speed
Max. rise/fall time
Min. rise/fall time
Directionality
Standard
100 kHz
1000 ns
-
Bidirectional
Fast
400 kHz
300 ns
20 ns*
Bidirectional
Fast-plus
1 MHz
300 ns
20 ns*
Bidirectional
High speed
3.4 MHz (100 pF bus)
1.7 MHz (400 pF bus)
120 ns** 240 ns**
15 ns** 30 ns**
Bidirectional
Ultra-fast
5 MHz
50 ns
25 ns
Unidirectional
*Assumes VDD/VCC = 5.5 V. Scales down linearly if VDD/VCC is lower **Divide these values by 2 for the clock line
Note that ultra-fast mode is the only mode where communication is used for downstream write operations only. This mode is also important as it helps us see when the bus impedance will need to be matched, which in practical terms is almost never. If we take a very conservative 10% limit on the critical line length, we find that the crucial length in these lines is 0.32 m, which is much longer than the size of most boards that will use I2C. If we use the knee frequency for the minimum rise/fall time with a 10% limit on critical length, we come to a much longer value of 0.92 m. We should take the more conservative number of 0.32 m for ultra-fast mode; any I2C line shorter than this value will not behave as a transmission line, and we only need to worry about the termination scheme.
The important points in termination are to select the right pull-up and series resistors. The pull-up resistors and the capacitance of the VDD/VCC line bus form a discharging and charging RC circuit, which is what provides a signal to the receiver when the driver switches. The pull-up resistor values (Rp) for the signal and clock lines must obey the following inequality:
Note that the number in the denominator above is defined for a 30% to 70% transition time, which is the standard in the I2C specification. For a 10%-90% transition time, replace 0.8473 with 2.2. This will further limit the value of the pull-up resistors.