RF PCB Design Guidelines You Must Know

Stackup Arrangement

A properly planned layer stackup forms the foundation of any high performance RF PCB layout:

Use Thin Dielectrics

At higher frequencies, a thinner dielectric allows tighter impedance control and reduced loss per inch. Typical RF dielectrics are 2 to 4 mils thick.

Orient Core Grain Direction

Alternate the dielectric grain direction in subsequent cores to equalize dimensional stability. This prevents skewing during lamination.

Include Ground Planes

Ground planes provide an ideal continuous RF return path and shielding. Place them strategically to isolate different signals.

Embed Controlled Impedances

Sandwich controlled impedance traces between ground planes to enhance tuning and shielding.

Model Before Finalizing

Model the stackup in your RF simulation tool and optimize before committing to a configuration.  Tweak dielectrics, copper weights, and arrangements as needed to refined the design.

Transmission Lines

Transmission lines like microstrips and striplines carry high frequency signals across a PCB:

Matched Impedance

Use controlled impedance lines matched to system impedance (typically 50 ohms) to minimize losses.

Short Stub Lines

Keep stubs short to avoid unwanted capacitive coupling. Use vertical transitions where changes are unavoidable.

Smooth Wave Impedance

Taper impedance gradually over longer lengths for impedance matching and reduced reflections.

Terminate Lines

Properly terminate lines in their system impedance at the load end to prevent reflections from discontinuities.

Reflection-Free Bends

Avoid 90 degree bends. Use arc or mitered 45 degree bevels to reduce discontinuities in the wave impedance.

Coupled Lengths

When coupling lines, tightly control the gap and length ratio to achieve target coupling factors.

Careful application of transmission line theory is critical to RF PCB performance.

Grounded Coplanar Waveguides

Grounded coplanar waveguides involve placing signal traces between ground planes on the same layer. Benefits include:

  • Excellent shielding and isolation
  • Permits closer packing density
  • Reduces radiation losses
  • Allows easy shielding vias to ground
  • Supports high frequency millimeter-wave signals

Use coplanar techniques where stripline or microstrip won’t suffice for shielding or density needs.

Passive Components

RF passives require special attention during layout:

Place Near ICs

Keep passives physically close to their driving IC pins to avoid long stub traces.

Orient Perpendicular

Wherever possible, orient inductors and capacitors perpendicular to their attached traces. This avoids parasitics.

Flood Ground Around

Provide a flood ground fill around all passive components.  This shields noise coupling and maintains low inductance.

Watch Spacing

mind spacing around passives to avoid coupling between components.

Model Libraries

Use vendor 3D models or EM-based parasitic models for passives for optimal simulation accuracy.

Careful passive layout minimizes parasitic effects that impair frequency response.

Material Selection

rogers substrate

Choosing suitable PCB materials is crucial for achieving target RF performance. Key considerations include:

Dielectric Constant

Select a dielectric constant to ensure proper impedance.  Variability risks impedance mismatches.

Loss Tangent

Lower loss materials like PTFE reduce insertion losses for greater range and efficiency.

Moisture Absorption

Lower absorption coefficients minimize performance degradation in humid conditions.

Thermal Properties

Manage lamination stresses and match expansion coefficients to avoid electrical issues from physical warping.

Lead-Free Assembly

Use high Tg materials compatible with lead-free assembly processes necessary for commercial products.

Availability

Choose readily available materials with multiple qualified laminators to control supply chain risks.

There are always tradeoffs to weigh when selecting RF laminates.

Copper and Finishes

Like dielectrics, carefully selecting conductor materials enhances RF response:

Copper Weights

Heavier copper above 2 oz enables better power handling and low loss performance.

Rolled or Electrodeposited

Electrodeposited copper foils tend to provide smoother surface finishes.

Surface Roughness

Smooth copper foil reduces conductor losses at high frequencies due to skin effects.

Final Finish

Immersion silver or gold provide excellent surface conductivity while slowing tarnishing.

Plating Buildup

For heavy power traces, electroplated copper increases conductor thickness over foil alone.

Thermal Management

Poor thermal performance impacts RF PCBs through:

  • Electrical parameter variations with temperature
  • Mechanical warping inducing stress
  • Accelerated aging and material breakdown

Use Thermal Vias

Place thermal vias under hot components allowing heat conduction to inner and bottom layers.

Flood Planes

Use thick copper plane layers as heat spreaders where possible.

Heatsinks

Add localized heatsinks under high power devices if needed.

Air Flow

Permit sufficient air flow for convection cooling during enclosure design.

Thermal Modeling

Model thermal performance early to identify hotspots and refine layouts.

Proper thermal design prevents fluctuations and damage over the operating life.

Simulations

Accurately simulating RF boards requires using the appropriate tools:

EM Simulators

Full wave 3D EM simulation captures complex energy interactions between components.

Parasitic Extractors

Model detailed parasitic characteristics caused by pads, vias, traces, and ground planes.

Material Models

Leverage available laminate material models from manufacturers capturing frequency dependent performance.

PCB PDN Analysis

Analyze common and differential path impedances to predict noise coupling on board.

S-Parameters

Use s-parameters for components to capture frequency-based input/output behavior.

TDR Modeling

Time domain TDR simulation validates impedance control and dispersion.

Matching simulations to real measured results builds confidence in the PCB layout.