PCB Routing Rules For Differential Pairs and Single-Ended Signals

PCB Routing Rules for Single-Ended Signals

Perhaps the most important point to note about PCB routing rules is that routing standards do not necessarily define themselves as “low speed” or “high speed.” This distinction has been largely created and perpetuated by PCB designers, and it largely arose due to signal integrity problems that arise when signal rise times become very fast (less than ~1 ns). As such, it’s more important to understand the constraints in your signaling standards when setting up your design rules, regardless of whether you’re dealing with slow or fast signal speeds.

The first place to look for the design rules you need is in the documentation for your signaling standards. The documentation for most standards is freely available online. As you create more designs, you’ll become more familiar with these standards and you’ll know which rules to set in your designs. Some of the most common PCB routing rules that apply to many standards for single-ended signals are:

  • Matched lengths. For bus standards or parallel data routing with source-synchronous clocking, you’ll need to enforce length matching for all nets in a group within some tolerance. While routing, this is done by adding length tuning structures to a net. 
  • Via transitions. Some standards recommend limiting the number of via transitions to prevent excess loss, reflections, and other parasitic effects. 
  • Maximum length. The maximum length of a net is sometimes specified for a given loss tangent value to prevent excessive signal attenuation. If you’re using a low-loss laminate, you can extend the length depending on the difference in loss tangent values. 
  • Clearances. Traces need to be kept separated from other objects that aren’t part of the net (pads, components, planes, etc.). This ensures manufacturability, reduces unwanted parasitics, and provides ESD protection in high voltage design.
  • Width and impedance. These two quantities are interrelated and are used for controlled impedance in high speed design. Take a look at this article to see how you can specify impedance and trace width as PCB routing rules. 

Differential Pair Routing Rules

Differential pairs are unique because slow and fast signals can be routed as differential pairs. Regardless of whether the signals are fast or slow, your differential pairs still need to obey some design rules that you would normally enforce for single-ended signals. Four important design rules to consider for differential pairs are:

  • Impedance tolerance. Even if you’re routing at less than the critical length, it’s best to bite the bullet and create an impedance profile for your differential pairs unless your signaling standard says otherwise. Other geometry constraints will depend on the allowed impedance variation along the differential pair. 
  • Maximum uncoupled length. This tells you the longest distance that the two sides of a differential pair can remain uncoupled (i.e., separated by a large distance). This is important as the uncoupled section will look like an impedance discontinuity, so it must be sufficiently short. 
  • Length matching. Remember, a differential signal is read by taking the difference between the two signals, so the two signals need to arrive at the receiver simultaneously. Faster signals require smaller length matching tolerances. 
  • Maximum net length. Just like single-ended signals, differential signaling standards may have a maximum length constraint. Consider CAN bus as an example; even though this is a slow-speed standard, the maximum link length (PCB traces + cable) will depend on the data rate you’ll use in your system. 

What Values Should You Use For Design Rules?

This is always a tough question to answer because it depends on many factors. Most importantly, it depends on the interface you are using; USB will have different constraints than PCIe, for example.

Assuming you have the specification for your interface and signals, you can quickly derive some design rule constraints and limits, either from calculating by hand or through some worst-case estimation.

Trace width (single-ended)

Based only on impedance target

Trace width and spacing (differential)

Based on differential impedance target and odd-mode impedance deviation

Trace-to-trace spacing (crosstalk)

  • If you’re not sure, use 3W
  • More often, it can be less than 3W
  • For differential pairs, also depends on P/N trace spacing

Length tuning limit

Determine based on

  • Mode conversion
  • Skew margin

Trace length

Based on total insertion loss, can be calculated from:

  • Conduction loss
  • Dielectric loss

For some of these values, such as insertion loss, you might have to use an external transmission line simulator to get an accurate loss value, or you will have to estimate the value from some calculations. For other design rules, such as mode conversion, simulation could happen after routing is complete in order to diagnose whether there are problems in the routing.