Controlling impedance (resistance) is almost a given with today’s technology. One day, we are adding a wireless option to a common object and calling it the Internet of Things. The next day, we’re simply keeping up with the competition on processing the code. Days go by and the trend is toward a greater percentage of the connections falling under the domain of impedance control.
There are two main branches of controlled impedance, single ended transmission lines are the backbone of RF technology while differential pairs do the heavy lifting for digital circuits. We’ll start with the single ended lines by saying that they actually do have a start and an end point. The signal is sent one way on the transmission line and the circuit is completed over the adjacent ground plane.
Figure 1. Image Credit: Author - A mixed-signal board is always a stretch with the various functions vying for limited space.
The main factor influencing impedance is the width of the trace relative to the thickness of the dielectric material between the trace and the ground plane or planes used as a reference. What is a reference? It is usually a metal plane with zero volts - “ground” but can also have a few volts of its own, either positive or negative relative to what’s happening on the trace itself.
A basic rule of thumb is that the width of the trace is about equal to the thickness of the dielectric material to achieve a 50 ohm impedance on the line. The exact number will be a product of a number of factors that define the optimum trace width.
“Good design practices with FR4 will usually do the trick.”
The thickness of the copper along with the dielectric constant (dk or e sub r) of the material are two primary factors in determining the trace geometry. Exotic materials are known for their thermal stability, their tight control over the dk and for a low loss tangent. Those properties come at a cost. The ceramic materials are typically found in high frequency and very high speed applications. Good design practices with FR4 will usually do the trick.
Additional PCB layers above the trace have an impact as it requires a transition between stripline and microstrip geometry. On balance the line is normally thinner on the inner layers but you’re compelled to provide a continuous ground plane on the layer above as well as below the inner layer transmission lines.
Routing on the outer layers can be affected by the presence of soldermask by some degree. Any kind of coating or large ferrous metal objects can affect an analog signal. The final linewidth and construction will adjust for those factors.
Let’s Get Digital - Differential Pairs in the Real World.
Turning over to the digital logic side of things, our favorite way to spew ones and zeros is to calculate the difference between two matching lines rather than trying to read a single line that is subject to momentary instances of noise as a voltage spikes across the landscape.
Figure 2. Image Credit: Maxfield EEWeb - The noted dimensions create the space for the digital waveforms to propagate. The stuff between the metal is the medium whose properties determine the rest of the values.
This is how differential pairs are different. Too much can go wrong with a long enough transmission line and you have dropped packets followed by check-sum bytes that do not add up to the number of bytes actually received. Whatever those instructions were, they have to be repeated. The user gets beachballs, hourglasses or, heaven forbid, stalled video!
A good microphone cord will have the triple connection so that it doesn’t pick up so much noise from the alternating current fields that flow around wherever they will. My guitar hits with a stronger signal so the two-wire cord is fine. That’s pretty much the two essential methods of data transport.
This plays out on the PCB as well. The second line, along with the ground, form a balanced circuit. We can use a low voltage and still transmit good data over a fair distance. The common approach is to use edge-coupled lines. They are routed side by side and the gap between them is a major variable. Loosely coupled lines are noted by the spacing between them being wider than the traces. Conversely, tightly coupled differential pairs have an air gap that is less than the trace width.
Figure 3. Image Credit: Maxfield EEWeb - Stacking the traces calls for a tight layer to layer registration requirement. Missing by 25 microns on a 100 micron trace throws off the alignment by 25%
So, let’s finish this. After determining the optimum geometry for your purpose, it becomes the fabrication vendor’s job to carry this out for real. They have material and equipment that is hopefully aligned with your goals. Otherwise, keep shopping. Giving the PCB house the data can take one of two forms.
Method 1: Provide A Target and Let the Vendor Come Up With a Plan
First and most common is to have a set of instructions or a table on the fabrication drawing describing the target impedance of traces broken down layer by layer for each impedance type in use. Give the line width and spacing where applicable as well as the reference layer(s) for calculating the impedance based on their specific materials and processes.
The note/table often reflects what is embedded in the PCB design software as the design rules. It’s common to have a call-out for every type on any controlled impedance layer designated in the constraints just to fill in the blanks.
The board may or may not have used every kind of trace on every available layer. If you cross out the subset of design rules that are not in use, it will be one question they don’t have to ask at tape-out time. Target the information that they need by obscuring what is not in play if your flow uses a standard template for impedance.
Method 2: Provide an Unwavering Set of Conditions
The other way seems a little more authoritarian in that it establishes an exact type of material through slash sheets and listing other criteria as deemed necessary. Then, there is no negotiation on the impedance control, only on the timeline and price for obtaining the material that meets the specifications.
This model served us well at a certain fabless chip maker where we could not be sure that every type of material would be suitable for the demands of the Snapdragon chips. When a PC board is sent out for fabrication, there may be some back and forth with the vendor where they would like to reduce the amount of copper in the via or somehow cut a few corners.
We had data! There were exactly the right number of vias and copper width to get the job done as designed. More than enough would make the chipset bigger. That boundary is set by marketing. It’s our job to make it work. We thus required a solid representation of the data rather than using it as a jumping off point. The words, “or equivalent” were strictly enforced.